| Nordic Thingy:52 v2.0.0

drv_lps22hb.h
1 /*
2 Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
3 All rights reserved.
4
5 Redistribution and use in source and binary forms, with or without modification,
6 are permitted provided that the following conditions are met:
7
8 1. Redistributions of source code must retain the above copyright notice, this
9 list of conditions and the following disclaimer.
10
11 2. Redistributions in binary form, except as embedded into a Nordic
12 Semiconductor ASA integrated circuit in a product or a software update for
13 such product, must reproduce the above copyright notice, this list of
14 conditions and the following disclaimer in the documentation and/or other
15 materials provided with the distribution.
16
17 3. Neither the name of Nordic Semiconductor ASA nor the names of its
18 contributors may be used to endorse or promote products derived from this
19 software without specific prior written permission.
20
21 4. This software, with or without modification, must only be used with a
22 Nordic Semiconductor ASA integrated circuit.
23
24 5. Any software provided in binary form under this license must not be reverse
25 engineered, decompiled, modified and/or disassembled.
26
27 THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
28 OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29 OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
30 DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
31 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
33 GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
36 OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
48 #ifndef __LPS22HB_H__
49 #define __LPS22HB_H__
50
51 #include "nrf_drv_twi.h"
52 #include <stdint.h>
53
55 #define INTERRUPT_CFG_REG 0x0B
56 #define INTERRUPT_CFG_REG_DEFAULT 0x00
57
59 #define INTERRUPT_CFG_REG_AUTORIFP_Pos 7
60 #define INTERRUPT_CFG_REG_AUTORIFP_Msk (1 << INTERRUPT_CFG_REG_AUTORIFP_Pos)
61 #define INTERRUPT_CFG_REG_AUTORIFP_Disable 0
62 #define INTERRUPT_CFG_REG_AUTORIFP_Enable 1
63
65 #define INTERRUPT_CFG_REG_RESET_ARP_Pos 6
66 #define INTERRUPT_CFG_REG_RESET_ARP_Msk (1 << INTERRUPT_CFG_REG_RESET_ARP_Pos)
67 #define INTERRUPT_CFG_REG_RESET_ARP_Disable 0
68 #define INTERRUPT_CFG_REG_RESET_ARP_Enable 1
69
71 #define INTERRUPT_CFG_REG_AUTOZERO_Pos 5
72 #define INTERRUPT_CFG_REG_AUTOZERO_Msk (1 << INTERRUPT_CFG_REG_AUTOZERO_Pos)
73 #define INTERRUPT_CFG_REG_AUTOZERO_Disable 0
74 #define INTERRUPT_CFG_REG_AUTOZERO_Enable 1
75
77 #define INTERRUPT_CFG_REG_RESET_AZ_Pos 4
78 #define INTERRUPT_CFG_REG_RESET_AZ_Msk (1 << INTERRUPT_CFG_REG_RESET_AZ_Pos)
79 #define INTERRUPT_CFG_REG_RESET_AZ_Disable 0
80 #define INTERRUPT_CFG_REG_RESET_AZ_Enable 1
81
83 #define INTERRUPT_CFG_REG_DIFF_EN_Pos 3
84 #define INTERRUPT_CFG_REG_DIFF_EN_Msk (1 << INTERRUPT_CFG_REG_DIFF_EN_Pos)
85 #define INTERRUPT_CFG_REG_DIFF_EN_Disable 0
86 #define INTERRUPT_CFG_REG_DIFF_EN_Enable 1
87
89 #define INTERRUPT_CFG_REG_LIR_Pos 2
90 #define INTERRUPT_CFG_REG_LIR_Msk (1 << INTERRUPT_CFG_REG_LIR_Pos)
91 #define INTERRUPT_CFG_REG_LIR_Disable 0
92 #define INTERRUPT_CFG_REG_LIR_Enable 1
93
95 #define INTERRUPT_CFG_REG_PLE_Pos 1
96 #define INTERRUPT_CFG_REG_PLE_Msk (1 << INTERRUPT_CFG_REG_PLE_Pos)
97 #define INTERRUPT_CFG_REG_PLE_Disable 0
98 #define INTERRUPT_CFG_REG_PLE_Enable 1
99
101 #define INTERRUPT_CFG_REG_PHE_Pos 0
102 #define INTERRUPT_CFG_REG_PHE_Msk (1 << INTERRUPT_CFG_REG_PHE_Pos)
103 #define INTERRUPT_CFG_REG_PHE_Disable 0
104 #define INTERRUPT_CFG_REG_PHE_Enable 1
105
107 #define THS_P_L_REG 0x0C
108
110 #define THS_P_H_REG 0x0D
111
113 #define WHO_AM_I_REG 0x0F
114 #define WHO_AM_I_REG_VALUE 0xB1
115
117 #define CTRL_REG1 0x10
118 #define CTRL_REG1_DEFAULT 0x00
119
121 #define CTRL_REG1_ODR_Pos 4
122 #define CTRL_REG1_ODR_Msk (7 << CTRL_REG1_ODR_Pos)
123 #define CTRL_REG1_ODR_OneShot 0
124 #define CTRL_REG1_ODR_PowerDown 0
125 #define CTRL_REG1_ODR_1Hz 1
126 #define CTRL_REG1_ODR_10Hz 2
127 #define CTRL_REG1_ODR_25Hz 3
128 #define CTRL_REG1_ODR_50Hz 4
129 #define CTRL_REG1_ODR_75Hz 5
130
132 #define CTRL_REG1_EN_LPFP_Pos 3
133 #define CTRL_REG1_EN_LPFP_Msk (1 << CTRL_REG1_EN_LPFP_Pos)
134 #define CTRL_REG1_EN_LPFP_Disable 0
135 #define CTRL_REG1_EN_LPFP_Enable 1
136
138 #define CTRL_REG1_LPFP_CFG_Pos 2
139 #define CTRL_REG1_LPFP_CFG_Msk (1 << CTRL_REG1_LPFP_CFG_Pos)
140 #define CTRL_REG1_LPFP_CFG_ODR_9 0
141 #define CTRL_REG1_LPFP_CFG_ODR_20 1
142
144 #define CTRL_REG1_BDU_Pos 1
145 #define CTRL_REG1_BDU_Msk (1 << CTRL_REG1_BDU_Pos)
146 #define CTRL_REG1_BDU_Disable 0
147 #define CTRL_REG1_BDU_Enable 1
148
150 #define CTRL_REG1_SIM_Pos 0
151 #define CTRL_REG1_SIM_Msk (1 << CTRL_REG1_SIM_Pos)
152 #define CTRL_REG1_SIM_4Wire 0
153 #define CTRL_REG1_SIM_3Wire 1
154
156 #define CTRL_REG2 0x11
157 #define CTRL_REG2_DEFAULT 0x10
158
160 #define CTRL_REG2_BOOT_Pos 7
161 #define CTRL_REG2_BOOT_Msk (1 << CTRL_REG2_BOOT_Pos)
162 #define CTRL_REG2_BOOT_Normal 0
163 #define CTRL_REG2_BOOT_Reboot 1
164
166 #define CTRL_REG2_FIFO_EN_Pos 6
167 #define CTRL_REG2_FIFO_EN_Msk (1 << CTRL_REG2_FIFO_EN_Pos)
168 #define CTRL_REG2_FIFO_EN_Disable 0
169 #define CTRL_REG2_FIFO_EN_Enable 1
170
172 #define CTRL_REG2_STOP_ON_FTH_Pos 5
173 #define CTRL_REG2_STOP_ON_FTH_Msk (1 << CTRL_REG2_STOP_ON_FTH_Pos)
174 #define CTRL_REG2_STOP_ON_FTH_Disable 0
175 #define CTRL_REG2_STOP_ON_FTH_Enable 1
176
178 #define CTRL_REG2_IF_ADD_INC_Pos 4
179 #define CTRL_REG2_IF_ADD_INC_Msk (1 << CTRL_REG2_IF_ADD_INC_Pos)
180 #define CTRL_REG2_IF_ADD_INC_Disable 0
181 #define CTRL_REG2_IF_ADD_INC_Enable 1
182
184 #define CTRL_REG2_I2C_DIS_Pos 3
185 #define CTRL_REG2_I2C_DIS_Msk (1 << CTRL_REG2_I2C_DIS_Pos)
186 #define CTRL_REG2_I2C_DIS_Disable 1
187 #define CTRL_REG2_I2C_DIS_Enable 0
188
190 #define CTRL_REG2_SWRESET_Pos 2
191 #define CTRL_REG2_SWRESET_Msk (1 << CTRL_REG2_SWRESET_Pos)
192 #define CTRL_REG2_SWRESET_Reset 1
193
195 #define CTRL_REG2_ONE_SHOT_Pos 0
196 #define CTRL_REG2_ONE_SHOT_Msk (1 << CTRL_REG2_ONE_SHOT_Pos)
197 #define CTRL_REG2_ONE_SHOT_Idle 0
198 #define CTRL_REG2_ONE_SHOT_Enable 1
199
201 #define CTRL_REG3 0x12
202 #define CTRL_REG3_DEFAULT 0x00
203
205 #define CTRL_REG3_INT_H_L_Pos 7
206 #define CTRL_REG3_INT_H_L_Msk (1 << CTRL_REG3_INT_H_L_Pos)
207 #define CTRL_REG3_INT_H_L_ActiveHigh 0
208 #define CTRL_REG3_INT_H_L_ActiveLow 1
209
211 #define CTRL_REG3_PP_OD_Pos 6
212 #define CTRL_REG3_PP_OD_Msk (1 << CTRL_REG3_PP_OD_Pos)
213 #define CTRL_REG3_PP_OD_PushPull 0
214 #define CTRL_REG3_PP_OD_OpenDrain 1
215
217 #define CTRL_REG3_F_FSS5_Pos 5
218 #define CTRL_REG3_F_FSS5_Msk (1 << CTRL_REG3_F_FSS5_Pos)
219 #define CTRL_REG3_F_FSS5_Disable 0
220 #define CTRL_REG3_F_FSS5_Enable 1
221
223 #define CTRL_REG3_F_FTH_Pos 4
224 #define CTRL_REG3_F_FTH_Msk (1 << CTRL_REG3_F_FTH_Pos)
225 #define CTRL_REG3_F_FTH_Disable 0
226 #define CTRL_REG3_F_FTH_Enable 1
227
229 #define CTRL_REG3_F_OVR_Pos 3
230 #define CTRL_REG3_F_OVR_Msk (1 << CTRL_REG3_F_OVR_Pos)
231 #define CTRL_REG3_F_OVR_Disable 0
232 #define CTRL_REG3_F_OVR_Enable 1
233
235 #define CTRL_REG3_DRDY_Pos 2
236 #define CTRL_REG3_DRDY_Msk (1 << CTRL_REG3_DRDY_Pos)
237 #define CTRL_REG3_DRDY_Disable 0
238 #define CTRL_REG3_DRDY_Enable 1
239
241 #define CTRL_REG3_INT_S_Pos 0
242 #define CTRL_REG3_INT_S_Msk (3 << CTRL_REG3_INT_S_Pos)
243 #define CTRL_REG3_INT_S_Pri 0
244 #define CTRL_REG3_INT_S_High 1
245 #define CTRL_REG3_INT_S_Low 2
246 #define CTRL_REG3_INT_S_HighOrLow 3
247
249 #define FIFO_CTRL_REG 0x14
250 #define FIFO_CTRL_REG_DEFAULT 0x00
251
253 #define FIFO_CTRL_REG_F_MODE_Pos 5
254 #define FIFO_CTRL_REG_F_MODE_Msk (7 << FIFO_CTRL_REG_F_MODE_Pos)
255 #define FIFO_CTRL_REG_F_MODE_Bypass 0
256 #define FIFO_CTRL_REG_F_MODE_Fifo 1
257 #define FIFO_CTRL_REG_F_MODE_Stream 2
258 #define FIFO_CTRL_REG_F_MODE_StreamToFifo 3
259 #define FIFO_CTRL_REG_F_MODE_BypassToStream 4
260 #define FIFO_CTRL_REG_F_MODE_DynamicStream 6
261 #define FIFO_CTRL_REG_F_MODE_BypassToFifo 7
262
264 #define REF_P_XL_REG 0x15
265
267 #define REF_P_L_REG 0x16
268
270 #define REF_P_H_REG 0x17
271
273 #define RPDS_L_REG 0x18
274
276 #define RPDS_H_REG 0x19
277
279 #define RES_CONF_REG 0x1A
280 #define RES_CONF_REG_DEFAULT 0x00
281
283 #define RES_CONF_REG_LC_EN_Pos 0
284 #define RES_CONF_REG_LC_EN_Msk (1 << RES_CONF_REG_LC_EN_Pos)
285 #define RES_CONF_REG_LC_EN_Disable 0
286 #define RES_CONF_REG_LC_EN_Enable 1
287
289 #define INT_SOURCE_REG 0x25
290
292 #define FIFO_STATUS_REG 0x26
293
295 #define STATUS_REG 0x27
296
298 #define STATUS_REG_T_OR_Pos 5
299 #define STATUS_REG_T_OR_Msk (1 << STATUS_REG_T_OR_Pos)
300 #define STATUS_REG_T_OR_Overrun 1
301
303 #define STATUS_REG_P_OR_Pos 4
304 #define STATUS_REG_P_OR_Msk (1 << STATUS_REG_P_OR_Pos)
305 #define STATUS_REG_P_OR_Overrun 1
306
308 #define STATUS_REG_T_DA_Pos 1
309 #define STATUS_REG_T_DA_Msk (1 << STATUS_REG_T_DA_Pos)
310 #define STATUS_REG_T_DA_Available 1
311
313 #define STATUS_REG_P_DA_Pos 0
314 #define STATUS_REG_P_DA_Msk (1 << STATUS_REG_P_DA_Pos)
315 #define STATUS_REG_P_DA_Available 1
316
318 #define PRESS_OUT_XL_REG 0x28
319
321 #define PRESS_OUT_L_REG 0x29
322
324 #define PRESS_OUT_H_REG 0x2A
325
327 #define TEMP_OUT_L_REG 0x2B
328
330 #define TEMP_OUT_H_REG 0x2C
331
333 #define LPFP_RES_REG 0x33
334
337 typedef struct
338 {
339 uint8_t int_cfg_reg;
340 uint16_t int_threshold;
341 uint8_t ctrl_reg1;
342 uint8_t ctrl_reg2;
343 uint8_t ctrl_reg3;
344 uint8_t fifo_ctrl;
345 uint8_t res_conf;
346 }drv_lps22hb_cfg_t;
347
350 typedef struct
351 {
352 uint8_t twi_addr;
353 uint32_t pin_int;
354 nrf_drv_twi_t const * p_twi_instance;
355 nrf_drv_twi_config_t const * p_twi_cfg;
356 } drv_lps22hb_twi_cfg_t;
357
360 typedef enum
361 {
362 DRV_LPS22HB_ODR_PowerDown,
363 DRV_LPS22HB_ODR_1Hz,
364 DRV_LPS22HB_ODR_10Hz,
365 DRV_LPS22HB_ODR_25Hz,
366 DRV_LPS22HB_ODR_50Hz,
367 DRV_LPS22HB_ODR_75Hz
368 }drv_lps22hb_odr_t;
369
374 uint32_t drv_lps22hb_init(void);
375
382 uint32_t drv_lps22hb_open(drv_lps22hb_twi_cfg_t const * const p_twi_cfg);
383
388 uint32_t drv_lps22hb_close(void);
389
396 uint32_t drv_lps22hb_verify(uint8_t * who_am_i);
397
404 uint32_t drv_lps22hb_cfg_set(drv_lps22hb_cfg_t const * const p_cfg);
405
412 uint32_t drv_lps22hb_cfg_get(drv_lps22hb_cfg_t * p_cfg);
413
420 uint32_t drv_lps22hb_ref_pressure_set(uint32_t ref_press);
421
428 uint32_t drv_lps22hb_ref_pressure_get(uint32_t * p_ref_press);
429
436 uint32_t drv_lps22hb_pressure_offset_set(uint16_t offset);
437
444 uint32_t drv_lps22hb_pressure_offset_get(uint16_t * p_offset);
445
450 uint32_t drv_lps22hb_reboot(void);
451
456 uint32_t drv_lps22hb_sw_reset(void);
457
462 uint32_t drv_lps22hb_one_shot(void);
463
470 uint32_t drv_lps22hb_fifo_status_get(uint8_t * p_status);
471
478 uint32_t drv_lps22hb_status_get(uint8_t * p_status);
479
486 uint32_t drv_lps22hb_int_source_get(uint8_t * p_source);
487
494 uint32_t drv_lps22hb_pressure_get(uint32_t * p_pressure);
495
502 uint32_t drv_lps22hb_temperature_get(uint16_t * p_temperature);
503
510 uint32_t drv_lps22hb_odr_set(drv_lps22hb_odr_t odr);
511
516 uint32_t drv_lps22hb_low_pass_reset(void);
517
518 #endif
519
drv_lps22hb_temperature_get
uint32_t drv_lps22hb_temperature_get(uint16_t *p_temperature)
Function for getting the temperature data.
drv_lps22hb_init
uint32_t drv_lps22hb_init(void)
Function for initializing the LPS22HB driver.
drv_lps22hb_close
uint32_t drv_lps22hb_close(void)
Function for closing the LPS22HB driver.
drv_lps22hb_pressure_offset_get
uint32_t drv_lps22hb_pressure_offset_get(uint16_t *p_offset)
Function for getting pressure offset.
drv_lps22hb_fifo_status_get
uint32_t drv_lps22hb_fifo_status_get(uint8_t *p_status)
Function for getting the FIFO status.
drv_lps22hb_status_get
uint32_t drv_lps22hb_status_get(uint8_t *p_status)
Function for getting the status.
drv_lps22hb_twi_cfg_t::p_twi_instance
nrf_drv_twi_t const * p_twi_instance
The instance of TWI master to be used for transactions.
Definition: drv_lps22hb.h:354
drv_lps22hb_cfg_t
Configuration struct for the LPS22HB pressure sensor.
Definition: drv_lps22hb.h:337
drv_lps22hb_pressure_offset_set
uint32_t drv_lps22hb_pressure_offset_set(uint16_t offset)
Function for setting pressure offset.
drv_lps22hb_ref_pressure_get
uint32_t drv_lps22hb_ref_pressure_get(uint32_t *p_ref_press)
Function for getting reference pressure.
drv_lps22hb_odr_set
uint32_t drv_lps22hb_odr_set(drv_lps22hb_odr_t odr)
Function for outputting data rate of the LPS22HB.
drv_lps22hb_verify
uint32_t drv_lps22hb_verify(uint8_t *who_am_i)
Function for reading and checking the WHO_AM_I register of the LPS22HB sensor.
drv_lps22hb_twi_cfg_t::pin_int
uint32_t pin_int
Interrupt pin number.
Definition: drv_lps22hb.h:353
drv_lps22hb_open
uint32_t drv_lps22hb_open(drv_lps22hb_twi_cfg_t const *const p_twi_cfg)
Function for opening the LPS22HB driver according to the specified configuration. ...
drv_lps22hb_one_shot
uint32_t drv_lps22hb_one_shot(void)
Function for starting a one-shot conversion of the LPS22HB sensor data.
drv_lps22hb_twi_cfg_t::p_twi_cfg
nrf_drv_twi_config_t const * p_twi_cfg
The TWI configuration to use while the driver is enabled.
Definition: drv_lps22hb.h:355
drv_lps22hb_odr_t
drv_lps22hb_odr_t
Available data rates.
Definition: drv_lps22hb.h:360
drv_lps22hb_reboot
uint32_t drv_lps22hb_reboot(void)
Function for rebooting the LPS22HB memory content.
drv_lps22hb_twi_cfg_t::twi_addr
uint8_t twi_addr
TWI address.
Definition: drv_lps22hb.h:352
drv_lps22hb_sw_reset
uint32_t drv_lps22hb_sw_reset(void)
Function for performing a software reset of the LPS22HB.
drv_lps22hb_int_source_get
uint32_t drv_lps22hb_int_source_get(uint8_t *p_source)
Function for getting the interrupt source register.
drv_lps22hb_ref_pressure_set
uint32_t drv_lps22hb_ref_pressure_set(uint32_t ref_press)
Function for setting reference pressure.
drv_lps22hb_cfg_set
uint32_t drv_lps22hb_cfg_set(drv_lps22hb_cfg_t const *const p_cfg)
Function for configuring the LPS22HB sensor according to the specified configuration.
drv_lps22hb_pressure_get
uint32_t drv_lps22hb_pressure_get(uint32_t *p_pressure)
Function for getting the pressure data. To calculate p(hPa) = *p_pressure(LSB) / 4096(LSB/hPa).
drv_lps22hb_twi_cfg_t
Initialization struct for the LPS22HB pressure sensor driver.
Definition: drv_lps22hb.h:350
drv_lps22hb_low_pass_reset
uint32_t drv_lps22hb_low_pass_reset(void)
Function for resetting low-pass filter of the LPS22HB.
drv_lps22hb_cfg_get
uint32_t drv_lps22hb_cfg_get(drv_lps22hb_cfg_t *p_cfg)
Function for reading the configuration of the LPS22HB sensor.