myRIO Custom FPGA Project

The myRIO Custom FPGA Project template provides a starting point for you to create NI myRIO applications by using custom FPGA code. You use the LabVIEW FPGA Module to create the custom FPGA code, which runs in parallel with the code that you create with the myRIO VIs and the LabVIEW Real-Time Module. The design of this template makes it easy to modify the code of the NI myRIO FPGA shipping personality while still maintaining the ability to use the myRIO VIs.

You can learn more about NI FPGA at ni.com/fpga.

System Requirements

Development System

Hardware

Use Cases

This template is suitable for applications that have the following characteristics:

The following are some example applications that can benefit from the use of this template:

Overview

This template consists of the following VIs:

The following figure shows the block diagram of RT Main.vi.

This template uses a Flat Sequence structure that executes the following three frames from left to right:

  1. Initialize—Initializes the application. Use this frame to open and set the custom FPGA bitfile that myRIO-1900/1950 Customized FPGA.vi generates. You can also use this frame to initialize variables and user interface elements like controls and indicators.
  2. Acquire and process data—Acquires data from the NI myRIO and processes the data for presentation. The While Loop repeats the code until you click Stop or an error occurs. You can use the myRIO VIs or the LabVIEW FPGA host interface in this frame. Use the FPGA host interface for any custom elements that you add to myRIO-1900/1950 Customized FPGA.vi and use the myRIO VIs to access any default NI myRIO functionality.
  3. Close—Closes and resets the custom FPGA code. You can also use this frame to clean up user interface elements and variables before the application exits.

Running This Template

  1. In the Project Explorer window, right-click myRIO-1900/1950»Chassis (myRIO-1900/1950)»FPGA Target»FPGA Main Default.vi/FPGA Main High Throughput.vi and select Create Build Specifications from the shortcut menu. Verify if FPGA target»Build Specifications now includes FPGA Main Default/FPGA Main High Throughput.
  2. Select File»Save to save the specification to the LabVIEW project.
  3. Right-click myRIO-1900/1950»Chassis (myRIO-1900/1950)»FPGA Target»Build Specifications»FPGA Main Default/FPGA Main High Throughput and select Build from the shortcut menu to display the Select Compile Server dialog box.
  4. Click OK to generate the custom FPGA bitfile.
  5. Open and run RT Main.vi.
  6. Press the user button on the NI myRIO and observe the state change of the Button Value indicator.
  7. Click Stop to stop the application.

Modifying This Template

Determining Your Needs

Before you customize this template for your own application, ask yourself the following questions:

Controlling the Order of Execution

This template uses the Flat Sequence structure to execute frames from left to right when all data values wired to a frame are available. The data leaves each frame as the frame finishes executing. Use sequence structures sparingly when you modify this template. Rely on data dependency or flow-through parameters to control the order of execution.

Adding Initialization Code

In the Initialize frame, add code that initializes your application. For example, you may want to initialize the data to specific values, open a file for logging, and so on. You must open and set the custom FPGA bitfile in this frame. Otherwise, the NI myRIO uses the FPGA shipping personality.

Modifying the Data Acquisition and Processing Code

By default, this template uses the Express VI to acquire user button data from the NI myRIO and displays the button value on a Boolean indicator. You can add your own code to acquire data from the NI myRIO and process the data based on your application needs. Use the myRIO VIs to access NI myRIO I/O channels and the onboard devices. Use the FPGA host interface to access the custom elements that you add to the FPGA code.

Adding Closing Code

In the Close frame, add code that executes after the data acquisition and processing is complete but before the application exits. Closing code commonly accomplishes the following tasks:

Note Note  You must close the custom FPGA reference in the Close frame so that the FPGA target is properly reset at the end of the application.

Modifying Error Handling

By default, this template stops if the Express VI returns an error or when you click the Stop button. When you customize this template, you can use the error in and error out clusters in each VI you use to pass the error information through the VI. If you want to ignore errors, you can remove the OR Function and wire the Stop button directly to the conditional terminal of the While Loop.

Additional Resources

Refer to the LabVIEW Help, available by selecting Help»LabVIEW Help from LabVIEW, for information about LabVIEW concepts or objects used in this sample project. You also can use the Context Help window to learn basic information about LabVIEW objects as you move the cursor over each object. To display the Context Help window in LabVIEW, select Help»Show Context Help.

Refer to the Voice Recorder sample project, available from the Create Project dialog box, for an example of adapting this template to an audio sampling application.


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